MC68HC705J1ACP

low-cost, high-performance M68HC05 Family, 8-bit microcontroller units (MCUs)

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Price:: US $0.01~200.00 / piece [Get Latest Price]

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	US $0.01~200.00

PartNumber:: MC68HC705J1ACP

Brand:: Freescale Semiconductor, Inc - Freescale | Pack: DIP | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-03-10

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Product Summary

The MC68HC705J1ACP is a member of Motorola low-cost, high-performance M68HC05 Family of 8-bit microcontroller units (MCUs). The M68HC05 Family is based on the customer-specified integrated circuit (CSIC) design strategy. All MCUs in the family use the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types. The on-chip memory includes 1240 bytes of erasable, programmable read-only memory (EPROM). In packages without the transparent window for EPROM erasure, the 1240 EPROM bytes serve as one-time programmable read-only memory (OTPROM).

Parametrics

Absolute maximum ratings: (1)Supply voltage, VDD: -0.3 to +7.0 V; (2)Current drain per pin (excluding VDD, VSS, and PA4-PA7), I: 25 mA; (3)Input voltage, VIn: VSS - 0.3 to VDD + 0.3 V; (4)IRQ/VPP pin, VPP: VSS - 0.3 to 2 x VDD + 0.3 V; (5)Storage temperature range, TSTG:-65 to +150℃.

Features

Features: (1)Peripheral modules: 15-stage multifunction timer; Computer operating properly (COP) watchdog; (2)14 bidirectional input/output (I/O) lines, including: 10-mA sink capability on four I/O pins; Mask option register (MOR) and software programmable pulldowns on all I/O pins; MOR selectable interrupt on four I/O pins, a keyboard scan; (3)feature; (4)MOR selectable sensitivity on external interrupt (edge- and; (5)level-sensitive or edge-sensitive only); (6)On-chip oscillator with connections for: Crystal; Ceramic resonator; Resistor-capacitor (RC) oscillator; External clock; (7)1240 bytes of EPROM/OTPROM, including eight bytes for user; (8)vectors; (9)64 bytes of user random-access memory (RAM); (10)Memory-mapped I/O registers; (11)Fully static operation with no minimum clock speed; (12)Power-saving stop, halt, wait, and data-retention modes; (13)External interrupt mask bit and acknowledge bit; (14)Illegal address reset; (15)Internal steering diode and pullup resistor from RESET pin to VDD.